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5.5 v input, 500 ma, low quiescent current, cmos linear regulators adp124/ADP125 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2009 analog devices, inc. all rights reserved. features input voltage supply range: 2.3 v to 5.5 v 500 ma maximum output current fixed and adjustable output voltage versions 1% initial accuracy up to 31 fixed-output voltage options available from 1.75 v to 3.3 v adjustable-output voltage range from 0.8 v to 5.0 v very low dropout voltage: 130 mv low quiescent current: 45 a low shutdown current: <1 a excellent psrr performance: 60 db at 100 khz excellent load/line transient response optimized for small 1.0 f ceramic capacitors current limit and thermal overload protection logic controlled enable compact 8-lead exposed paddle msop package applications digital camera and audio devices portable and battery-powered equipment automatic meter reading (amr) meters gps and location management units medical instrumentation point of load power typical application circuits 2 4 1 5 8 v out = 3.3v v in = 5.5v vout vout vin vout sense nc gnd vin en c2 c1 adp124 off on 7 3 6 08476-001 figure 1. adp124 with fixed output voltage 2 4 1 5 8 v out = 3.3 v v in = 5.5v vout vout vin adj nc gnd vin en c2 r1 r2 c1 ADP125 7 3 6 08476-002 off on figure 2. adp 125 with adjustable output voltage general description the adp124/ADP125 are low quiescent current, low dropout linear regulators. they are designed to operate from an input voltage between 2.3 v and 5.5 v and to provide up to 500 ma of output current. the low 130 mv dropout voltage at a 500 ma load improves efficiency and allows operation over a wide input voltage range. the low 210 a of quiescent current with a 500 ma load makes the adp124/ADP125 ideal for battery-operated portable equipment. the adp124 is capable of 31 fixed-output voltages from 1.75 v to 3.3 v. the ADP125 is the adjustable version of the device and allows the output voltage to be set between 0.8 v and 5.0 v by an external voltage divider. the adp124/ADP125 are specifically designed for stable operation with tiny 1 f ceramic input and output capacitors to meet the requirements of high performance, space constrained applications. the adp124/ADP125 have an internal soft start that gives a constant start-up time of 350 s. short-circuit protection and thermal overload protection circuits prevent damage in adverse conditions. the adp124/ADP125 are available in an 8-lead exposed paddle msop package. when compared with the standard msop package, the exposed paddle msop package has lower thermal resistance ( ja ). the lower thermal resistance package allows the adp124/ADP125 to meet the needs of a variety of portable applications while minimizing the rise in junction temperature.
adp124/ADP125 rev. 0 | page 2 of 2 0 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? typical application circuits ............................................................ 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? recommended capacitor specifications ................................... 4 ? absolute maximum ratings ............................................................ 5 ? thermal data ................................................................................ 5 ? thermal resistance ...................................................................... 5 ? esd caution .................................................................................. 5 ? pin configurations and function descriptions ........................... 6 ? typical performance characteristics ..............................................7 ? theory of operation ...................................................................... 11 ? applications information .............................................................. 12 ? capacitor selection .................................................................... 12 ? undervoltage lockout ............................................................... 13 ? enable feature ............................................................................ 13 ? current limit and thermal overload protection ................. 14 ? thermal considerations ............................................................ 14 ? junction temperature calculations ......................................... 15 ? printed circuit board layout considerations ....................... 16 ? outline dimensions ....................................................................... 17 ? ordering guide .......................................................................... 17 ? revision history 12/09revision 0: initial version
adp124/ADP125 rev. 0 | page 3 of 20 specifications unless otherwise noted, v in = (v out + 0.5 v) or 2.3 v, whichever is greater; adj connected to vout; i out = 10 ma; c in = 1.0 f; c out = 1.0 f; t a = 25c. table 1. parameter symbol test conditions min typ max unit input voltage range v in 2.3 5.5 v operating supply current 1 i gnd i out = 0 a 45 a i out = 0 a, t j = ?40c to +125c 105 a i out = 1 ma 60 a i out = 1 ma, t j = ?40c to +125c 120 a i out = 250 ma 160 a i out = 250 ma, t j = ?40c to +125c 210 a i out = 500 ma 210 a i out = 500 ma, t j = ?40c to +125c 280 a shutdown current i sd en = gnd 0.1 a en = gnd, t j = ?40c to +125c 1 a output voltage accuracy 2 v out fixed output i out = 10 ma ?1 +1 % 100 a < i out < 500 ma, v in = (v out + 0.5 v) to 5.5 v, t j = ?40c to +125c ?2 +1.5 % adjustable output i out = 10 ma 0.495 0.500 0.505 v 100 a < i out < 500 ma, v in = 2.3 v to 5.5 v, t j = ?40c to +125c 0.485 0.500 0.515 v line regulation ?v out /?v in v in = v in = 2.3 v to 5.5 v, t j = ?40c to +125c ?0.05 +0.05 %/v load regulation 3 ?v out /?i out i out = 1 ma to 500 ma 0.0005 %/ma i out = 1 ma to 500 ma, t j = ?40c to +125c 0.001 %/ma adj input bias current adj i-bias 2.3 v v in 5.5 v, adj connected to vout 15 na dropout voltage 4 v dropout i out = 10 ma, v out > 2.3 v 3 mv i out = 10 ma, t j = ?40c to +125c 5 mv i out = 250 ma, v out > 2.3 v 65 mv i out = 250 ma, t j = ?40c to +125c 120 mv i out = 500 ma, v out > 2.3v 130 mv i out = 500 ma, t j = ?40c to +125c 230 mv start-up time 5 t start-up v out = 3.0 v 350 s current limit threshold 6 i limit 550 750 1000 ma thermal shutdown thermal shutdown threshold ts sd t j rising 150 c thermal shutdown hysteresis ts sd-hys 15 c en input en input logic high v ih 2.3 v v in 5.5 v 1.2 v en input logic low v il 2.3 v v in 5.5 v 0.4 v en input leakage current v i-leakage en = vin or gnd 0.1 a en = vin or gnd, t j = ?40c to +125c 1 a undervoltage lockout uvlo input voltage rising uvlo rise t j = ?40c to +125c 2.1 v input voltage falling uvlo fall t j = ?40c to +125c 1.5 v hysteresis uvlo hys t a = 25c 125 mv
adp124/ADP125 rev. 0 | page 4 of 20 parameter symbol test conditions min typ max unit output noise out noise 10 hz to 100 khz, v in = 5.5 v, v out = 1.2 v 25 v rms 10 hz to 100 khz, v in = 5.5 v, v out = 1.8 v 35 v rms 10 hz to 100 khz, v in = 5.5 v, v out = 2.5 v 45 v rms 10 hz to 100 khz, v in = 5.5 v, v out = 3.3 v 55 v rms 10 hz to 100 khz, v in = 5.5 v, v out = 4.2v 65 v rms power supply rejection ratio (v in = v out +1v) psrr 10 khz to 100 khz, v out = 1.8 v, 2.5 v, 3.3 v 60 db 1 the current from the external resistor divider network in the case of adjustable voltage output (as with the ADP125) should be subtracted from the ground current measured. 2 accuracy when vout is connected directly to adj. when vout vo ltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances of the resistors used. 3 based on an en dpoint calculation using 1 ma and 500 ma loads. 4 dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output vol tage. this applies only for output voltages greater than 2.3v. 5 start-up time is defined as the time between the rising edge of en to vout being at 90% of its nominal value. 6 current limit threshold is defi ned as the current at which the output voltage dr ops to 90% of the specif ied typical value. for example, the current limit for a 3.3 v output voltage is defined as the c urrent that causes the output voltage to drop to 90% of 3.3v, or 2.97 v. recommended capacitor specifications table 2. parameter symbol test conditions min typ max unit minimum input and output capacitance 1 cap min t a = ?40c to +125c 0.70 f capacitor esr r esr t a = ?40c to +125c 0.001 1 1 the minimum input and output capacitance should be greater than 0.70 f over the full range of operating conditions. the full range of operating conditions in the application must be considered during devi ce selection to ensure that the minimum capa citance specification is met. x7r and x5r type capacitors are recommended; y5v and z5u capacitors are not recommended for use with this ldo.
adp124/ADP125 rev. 0 | page 5 of 20 absolute maximum ratings table 3. parameter rating vin to gnd ?0.3 v to +6.5v adj to gnd ?0.3 v to +4 v en to gnd ?0.3 v to +6.5v vout to gnd ?0.3 v to vin storage temperature range ?65c to +150c operating ambient temperature range ?40c to +85c operating junction temperature range ?40c to +125c soldering conditions jedec j-std-020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal data absolute maximum ratings apply individually only, not in combination. the adp124/ADP125 can be damaged when the junction temperature limits are exceeded. monitoring ambient temperature does not guarantee that t j will remain within the specified temperature limits. in applications with high power dissipation and poor thermal resistance, the maximum ambient temperature may have to be limited. in applications with moderate power dissipation and low pcb thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. the junction temperature (t j ) of the device is dependent on the ambient temperature (t a ), the power dissipation of the device (p d ), and the junction-to-ambient thermal resistance of the package ( ja ). maximum junction temperature (t j ) is calculated from the ambient temperature (t a ) and power dissipation (p d ) using the formula t j = t a + ( p d ja ) the junction-to-ambient thermal resistance ( ja ) of the package is based on modeling and calculation using a 4-layer board. the junction-to-ambient thermal resistance is highly dependent on the application and board layout. in applications in which high maxi- mum power dissipation exists, close attention to thermal board design is required. the value of ja may vary, depending on pcb material, layout, and environmental conditions. the specified values of ja are based on a 4-layer, 4 inch 3 inch circuit board. refer to jesd 51-7 for detailed information on the board construction jb is the junction-to-board thermal characterization parameter and is measured in c/w. the jb of the package is based on modeling and calculation using a 4-layer board. the guidelines for reporting and using package thermal information: jesd51-12 states that thermal characterization parameters are not the same as thermal resistances. jb measures the component power flowing through multiple thermal paths rather than a single path as in thermal resistance, jb . therefore, jb thermal paths include convection from the top of the package as well as radiation from the packagefactors that make jb more useful in real-world applications. maximum junction temperature (t j ) is calculated from the board temperature (t b ) and power dissipation (p d ) using the formula t j = t b + ( p d jb ) refer to jesd51-8 and jesd51-12 for more detailed information about jb . thermal resistance ja and jb are specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 4. thermal resistance package type ja jb unit 8-lead msop 102.8 31.8 c/w esd caution
adp124/ADP125 rev. 0 | page 6 of 20 pin configurations and function descriptions vout 1 vout 2 v out sense 3 gnd 4 vin 8 vin 7 nc 6 en 5 nc = no connect adp124 top view (not to scale) 08476-003 figure 3. adp124 fixed ou tput pin configuration vout 1 vout 2 adj 3 gnd 4 vin 8 vin 7 nc 6 en 5 nc = no connect ADP125 top view (not to scale) 08476-004 figure 4. ADP125 adjustable output pin configuration table 5. pin function descriptions mnemonic pin no. adp124 ADP125 description 1 vout vout regulated output voltage. bypass vout to gnd with a 1 f or greater capacitor. 2 vout vout regulated output voltage. bypass vout to gnd with a 1 f or greater capacitor. 3 vout sense n/a feedback node for th e error amplifier. connect to vout. n/a adj feedback node for the error amplifier. connect the midpoint of an external divider from vout to gnd to this pin to set the output voltage. 4 gnd gnd ground. 5 en en enable input. drive en high to turn on the regulator; drive en low to turn off the regulator. for automatic startup, connect en to vin. 6 nc nc no connect. this pin is not connected internally. 7 vin vin regulator input supply. bypass vin to gnd with a 1 f or greater capacitor. 8 vin vin regulator input supply. bypass vin to gnd with a 1 f or greater capacitor. ep ep the exposed pad must be connected to ground.
adp124/ADP125 rev. 0 | page 7 of 20 typical performance characteristics v in = 3.8 v, v out = 3.3v, i out = 10 ma, c in = 1.0 f, c out = 1.0 f, t a = 25c, unless otherwise noted. 3.270 3.275 3.280 3.285 3.290 3.295 3.300 3.305 3.310 ?40 ?5 +25 +85 +125 junction temperature (c) v out (v) i out = 100a i out = 1ma i out = 10ma i out = 100ma i out = 300ma i out = 500ma 08476-005 figure 5. output voltage vs. junction temperature 3.303 3.304 3.305 3.306 3.307 3.308 3.309 0.1 1 10 100 1000 i out (ma) v out (v) 08476-006 figure 6. output volt age vs. load current 3.292 3.294 3.296 3.298 3.300 3.302 3.304 3.306 3.308 3.310 3.50 4.00 4.50 5.00 5.50 v in (v) v out (v) i out = 100a i out = 1ma i out = 10ma i out = 100ma i out = 300ma i out = 500ma 08476-007 figure 7. output voltage vs. input voltage 50 100 150 200 250 300 ground current (a) ?40 ?5 +25 +85 +125 junction temperature (c) i out = 100a i out = 1ma i out = 10ma i out = 100ma i out = 300ma i out = 500ma 08476-008 figure 8. ground current vs. junction temperature 0 50 100 150 200 250 0.1 1 10 100 1000 i load (ma) ground current (a) 0 8476-009 figure 9. ground current vs. load current 50 70 90 110 130 150 170 190 210 230 250 3.50 4.00 4.50 5.00 5.50 v in (v) ground current (a) i out = 100a i out = 1ma i out = 10ma i out = 100ma i out = 300ma i out = 500ma 08476-010 figure 10. ground current vs. input voltage
adp124/ADP125 rev. 0 | page 8 of 20 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 ?50 ?25 0 25 50 75 100 125 temperature (c) shutdown current (a) v in = 3.80 v in = 4.20 v in = 4.40 v in = 5.00 v in = 5.20 v in = 5.40 v in = 5.50 08476-011 figure 11. shutdown current vs. temperature at various input voltages 0 20 40 60 80 100 120 1 10 100 1000 i out (ma) dropout (mv) 08476-012 figure 12. dropout voltage vs. load current 0 50 100 150 200 250 300 350 400 450 3.00 3.10 3.20 3.30 3.40 3.50 3.60 3.70 v in (v) i gnd (a) i out = 100ma i out = 300ma i out = 500ma i out = 10ma 08476-013 figure 13. ground current vs. input voltage (in dropout) 2.95 3.00 3.05 3.10 3.15 3.20 3.25 3.30 3.35 3.00 3.10 3.20 3.30 3.40 3.50 3.60 v in (v) v out (v) i out = 100ma i out = 300ma i out = 500ma i out = 10ma 08476-014 figure 14. output voltage vs. input voltage (in dropout) ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ? 10 10 100 1k 10k 100k 1m 10m frequency (hz) psrr (db) i out = 100a v in = v out +1v v ripple = 50mv c in = c out = 1f i out = 1ma i out = 10ma i out = 100ma i out = 300ma i out = 500ma 08476-015 figure 15. power supply rejection ratio vs. frequency, v out = 2.8 v, v in = 3.8 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ? 10 10 100 1k 10k 100k 1m 10m frequency (hz) psrr (db) i out = 100a v in = v out +1v v ripple = 50mv c in = c out = 1f i out = 1ma i out = 10ma i out = 100ma i out = 300ma i out = 500ma 08476-016 figure 16. power supply rejection ratio vs. frequency, v out = 3.3 v, v in = 4.3 v
adp124/ADP125 rev. 0 | page 9 of 20 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ? 10 10 100 1k 10k 100k 1m 10m frequency (hz) psrr (db) i out = 100a v in = v out + 1v v ripple = 50mv c in = c out = 1f i out = 1ma i out = 10ma i out = 100ma i out = 300ma i out = 500ma 08476-017 figure 17. power supply rejection ratio vs. frequency, v out = 4.2 v, v in = 5.2 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ? 10 10 100 1k 10k 100k 1m 10m frequency (hz) psrr (db) v out = 2.8v, i out = 10ma v in = v out + 1v v ripple = 50mv c in = c out = 1f v out = 3.3v, i out = 10ma v out = 4.2v, i out = 10ma v out = 2.8v, i out = 500ma v out = 3.3v, i out = 500ma v out = 4.2v, i out = 500ma 08476-018 figure 18. power supply reject ion ratio vs. frequency, various output voltages and load currents ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ? 10 10 100 1k 10k 100k 1m 10m psrr (db) frequency (hz) v in = 3.1v, i out = 10ma v in = 3.3v, i out = 10ma v in = 3.8v, i out = 10ma v in = 4.8v, i out = 10ma v in = 3.1v, i out = 500ma v in = 3.3v, i out = 500ma v in = 3.8v, i out = 500ma v in = 4.8v, i out = 500ma 08476-019 figure 19. power supply rejection ratio vs. headroom voltage (v in ? v out ), v out = 2.8 v 0 1 2 3 4 5 10 100 1k 10k 100k frequency (hz) noise (v/ hz) 08476-020 v out = 2.8v v out = 3.3v v out = 4.2v figure 20. output noise spectrum, v in = 5 v 20 25 30 35 40 45 50 55 60 65 70 0.001 0.01 0.1 1 10 100 1k i load (ma) rms noise (v) v out = 2.8v v out = 3.3v v out = 4.2v 08476-021 figure 21. output noise vs. load current and output voltage, v in = 5 v 08476-022 m40.0s a ch1 200ma 1 2 t 9.800% v in = 4v v out = 3.3v v out 1ma to 500ma load step ch1 500ma ? b w ch2 50.0mv b w i out figure 22. load transient response, c out = 1 f
adp124/ADP125 rev. 0 | page 10 of 20 08476-023 m40.0s a ch1 200ma 1 2 t 9.800% v in = 4v v out = 3.3v v out i out 1ma to 500ma load step ch1 500ma ? b w ch2 50.0mv b w figure 23. load transient response, c out = 4.7 f 08476-024 m10.0s a ch3 2.36v 2 1 t 9.600% v out 4v to 4.5v voltage step ch1 1.00v b w ch2 2.00mv b w v in figure 24. line transient re sponse, load current = 1 ma 08476-025 m10.0s a ch3 200ma 2 1 t 9.800% v out v in 4v to 4.5v voltage step ch1 1.00v b w ch2 2.00mv b w figure 25. line transient resp onse, load current = 500 ma
adp124/ADP125 rev. 0 | page 11 of 20 theory of operation the adp124/ADP125 are low quiescent current, low dropout linear regulators that operate from 2.3 v to 5.5 v and can provide up to 500 ma of output current. drawing a low 210 a of quies- cent current (typical) at full load makes the adp124/ADP125 ideal for battery-operated portable equipment. shutdown current consumption is typically 100 na. optimized for use with small 1 f ceramic capacitors, the adp124/ADP125 provide excellent transient performance. internally, the adp124/ADP125 consist of a reference, an error amplifier, a feedback voltage divider, and a pmos pass transistor. output current is delivered via the pmos pass device, which is controlled by the error amplifier. the error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. if the feedback voltage is lower than the reference voltage, the gate of the pmos device is pulled lower, allowing more current to pass and increasing the output voltage. if the feedback voltage is higher than the reference voltage, the gate of the pmos device is pulled higher, allowing less current to pass and decreasing the output voltage. the adjustable ADP125 has an output voltage range of 0.8 v to 5.0 v. the output voltage is set by the ratio of two external resistors, as shown in figure 2 . the device servos the output to maintain the voltage at the adj pin at 0.5 v referenced to ground. the current in r1 is then equal to 0.5 v/r2 and the current in r1 is the current in r2 plus the adj pin bias current. the adj pin bias current, 15 na at 25c, flows through r1 into the adj pin. the output voltage can be calculated using the equation: v out = 0.5 v(1 + r1 / r2 ) + (adj i-bias )(r1 ) the value of r1 should be less than 200 k to minimize errors in the output voltage caused by the adj pin bias current. for example, when r1 and r2 each equal 200 k, the output voltage is 1.0 v. the output voltage error introduced by the adj pin bias current is 3 mv or 0.3%, assuming a typical adj pin bias current of 15 na at 25c. note that in shutdown, the output is turned off and the divider current is 0. the adp124/ADP125 use the en pin to enable and disable the vout pin under normal operating conditions. when en is high, vout turns on; when en is low, vout turns off. for automatic startup, en can be tied to vin. short circuit, uvlo, and thermal protect 0.5v reference adp124 shutdown vin vout r1 r2 gnd notes 1. r1 and r2 are internal resistors, available on the adp124 only. en vout sense 08476-121 figure 26. adp124 internal block diagram (fixed output) short circuit, uvlo, and thermal protect 0.5v reference shutdown vin vout gnd en 08476-122 ADP125 adj figure 27. ADP125 internal block diagram (adjustable output)
adp124/ADP125 rev. 0 | page 12 of 20 applications information capacitor selection output capacitor the adp124/ADP125 are designed for operation with small, space-saving ceramic capacitors, but these devices can function with most commonly used capacitors as long as care is taken to ensure an appropriate effective series resistance (esr) value. the esr of the output capacitor affects the stability of the ldo control loop. a minimum of 0.70 f capacitance with an esr of 1 or less is recommended to ensure stability of the adp124/ADP125. the transient response to changes in load current is also affected by the output capacitance. using a larger value of output capacitance improves the transient response of the adp124/ADP125 to dynamic changes in load current. figure 28 and figure 29 show the transient responses for output capacitance values of 1 f and 4.7f, respectively. 08476-028 m400ns a ch1 200ma 1 2 t 13.20% v in = 4v v out = 3.3v v out i out 1ma to 500ma load step ch1 500ma ? b w ch2 50.0mv b w figure 28. output transient response, c out = 1 f 08476-029 m400ns a ch1 200ma 1 2 t 13.60% v in = 4v v out = 3.3v v out i out 1ma to 500ma load step ch1 500ma ? b w ch2 50.0mv b w figure 29. output transient response, c out = 4.7 f input bypass capacitor connecting a 1 f capacitor from vin to gnd reduces the circuit sensitivity to the printed circuit board (pcb) layout, especially when a long input trace or high source impedance is encountered. if greater than 1 f of output capacitance is required, the input capacitor should be increased to match it. input and output capacitor properties any good quality ceramic capacitors can be used with the adp124/ADP125, as long as the capacitor meets the minimum capacitance and maximum esr requirements. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. capacitors must have an adequate dielectric to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. using an x5r or x7r dielectric with a voltage rating of 6.3 v or 10 v is recommended. however, using y5v and z5u dielectrics are not recommended for any ldo, due to their poor temperature and dc bias characteristics. figure 30 depicts the capacitance vs. capacitor voltage bias charac- teristics of an 0402, 1 f, 10 v x5r capacitor. the voltage stability of a capacitor is strongly influenced by the capacitor size and the voltage rating. in general, a capacitor in a larger package or of a higher voltage rating exhibits better stability. the temperature variation of the x5r dielectric is about 15% over the ?40c to +85c temperature range and is not a function of package or voltage rating. 0.70 0.75 0.80 0.85 0.90 0.95 1.00 1.05 1.10 01234567 bias voltage (v) c a pacitance (f) 08476-030 figure 30. capacitance vs. capacitor voltage bias characteristics equation 1 can be used to determine the worst-case capacitance, accounting for capacitor variation over temperature, component tolerance, and voltage. c eff = c (1 ? tempco ) (1 ? tol) (1) where: c eff is the effective capacitance at the operating voltage. c is the rated capacitance value. tempco is the worst-case capacitor temperature coefficient. tol is the worst-case component tolerance.
adp124/ADP125 rev. 0 | page 13 of 20 in this example, the worst-case temperature coefficient (tempco) over ?40c to +85c is assumed to be 15% for an x5r dielectric. the tolerance of the capacitor (tol) is assumed to be 10%, and c is 0.94 f at 4.2 v from the graph in figure 30 . substituting these values in equation 1 yields c eff = 0.94 f (1 ? 0.15) (1 ? 0.1) = 0.719 f therefore, the capacitor chosen in this example meets the minimum capacitance requirement of the ldo over tem- perature and tolerance at the chosen output voltage. to guarantee the performance of the adp124/ADP125, it is imperative that the effects of dc bias, temperature, and tolerances on the behavior of the capacitors are evaluated for each application. undervoltage lockout the adp124/ADP125 have an internal undervoltage lockout circuit that disables all inputs and the output when the input voltage is less than approximately 2 v. this ensures that the adp124/ADP125 inputs and the output behave in a predictable manner during power-up. enable feature the adp124/ADP125 uses the en pin to enable and disable the vout pin under normal operating conditions. as shown in figure 31 , when a rising voltage on en crosses the active threshold, vout turns on. conversely, when a falling voltage on en crosses the inactive threshold, vout turns off. 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 v en v out 08476-230 figure 31. typical en pin operation as shown in figure 31 , the en pin has built-in hysteresis. this prevents on/off oscillations that may occur due to noise on the en pin as it passes through the threshold points. the active and inactive thresholds of the en pin are derived from the vin voltage. therefore, these thresholds vary as the input voltage changes. figure 32 shows typical en active and inactive thresholds when the vin voltage varies from 2.3 v to 5.5 v. 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 1.05 2.2 2.7 3.2 3.7 4.2 4.7 5.2 v in (v) enable (en) tresholds (v) falling rising 08476-032 figure 32. typical en pin thresholds vs. input voltage the adp124/ADP125 use an internal soft start to limit the in- rush current when the output is enabled. the start-up time for the 2.8 v option is approximately 350 s from the time the en active threshold is crossed to when the output reaches 90% of its final value. as shown in figure 33 , the start-up time is dependent on the output voltage setting and increases slightly as the output voltage increases. 08476-033 ch1 1.00v ch2 1.00v b w m100s a ch1 2.00v 2 1 t 296.800s v out = 2.8v v out = 3.3v v out = 4.2v v in = 5v figure 33. typical start-up time
adp124/ADP125 rev. 0 | page 14 of 20 current limit and thermal overload protection the adp124/ADP125 are protected from damage due to excessive power dissipation by current and thermal overload protection circuits. the adp124/ADP125 are designed to limit the current when the output load reaches 750 ma (typical). when the output load exceeds 750 ma, the output voltage is reduced to maintain a constant current limit. thermal overload protection is included, which limits the junction temperature to a maximum of 150c typical. under extreme con- ditions (that is, high ambient temperature and power dissipation), when the junction temperature starts to rise above 150c, the output is turned off, reducing output current to zero. when the junction temperature cools to less than 135c, the output is turned on again and the output current is restored to its nominal value. consider the case where a hard short from vout to gnd occurs. at first, the adp124/ADP125 limit the current so that only 750 ma is conducted into the short. if self-heating causes the junction temperature to rise above 150c, thermal shutdown activates, turning off the output and reducing the output current to zero. when the junction temperature cools to less than 135c, the output turns on and conducts 750 ma into the short, again causing the junction temperature to rise above 150c. this thermal oscillation between 135c and 150c results in a current oscillation between 750 ma and 0 ma that continues as long as the short remains at the output. current and thermal limit protections are intended to protect the device from damage due to accidental overload conditions. for reliable operation, the device power dissipation must be externally limited so that the junction temperature does not exceed 125c. thermal considerations to guarantee reliable operation, the junction temperature of the adp124/ADP125 must not exceed 125c. to ensure that the junction temperature is less than this maximum value, the user needs to be aware of the parameters that contribute to junction temperature changes. these parameters include ambient tem- perature, power dissipation in the power device, and thermal resistances between the junction and ambient air ( ja ). the value of ja is dependent on the package assembly compounds used and the amount of copper to which the gnd pins of the package are soldered on the pcb. table 6 shows typical ja values of the 8-lead msop package for various pcb copper sizes. table 6. typical ja values for specified pcb copper sizes copper size (mm 2 ) ja (c/w) 40 102.8 100 75.5 500 42.5 1000 34.7 6400 26.1 the typical jb value is 31.7c/w. the junction temperature of the adp124/ADP125 can be calculated from the following equation: t j = t a + ( p d ja ) (2) where: t a is the ambient temperature. p d is the power dissipation in the die, given by p d = [(v in ? v out ) i load ] + ( v in i gnd ) (3) where: i load is the load current. i gnd is the ground current. v in and v out are input and output voltages, respectively. the power dissipation due to ground current is quite small and can be ignored. therefore, the junction temperature equation can be simplified as follows: t j = t a + {[( v in ? v out ) i load ] ja } (4) as shown in equation 4, for a given ambient temperature, input- to-output voltage differential, and continuous load current, there exists a minimum copper size requirement for the pcb to ensure that the junction temperature does not rise above 125c. figure 34 through figure 40 show junction temperature calculations for different ambient temperatures, load currents, v in to v out differentials, and areas of pcb copper. in cases where the board temperature is known, the thermal characterization parameter, jb , can be used to estimate the jun- ction temperature rise. the maximum junction temperature (t j ) is calculated from the board temperature (t b ) and power dissipation (p d ) using the formula t j = t b + ( p d jb ) (5)
adp124/ADP125 rev. 0 | page 15 of 20 junction temperature calculations 0 20 40 60 80 100 120 140 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) juction temper a ture (c) t j max i load = 500ma i load = 10ma i load = 100ma i load = 200ma i load = 300ma i load = 400ma i load = 1ma 08476-034 figure 34. junction temperature vs. power dissipation, 1000 mm 2 of pcb copper, t a = 25c 0 20 40 60 80 100 120 140 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temper a ture (c) t j max i load = 500ma i load = 10ma i load = 100ma i load = 1ma 08476-035 i load = 400ma i load = 300ma i load = 200ma figure 35. junction temperature vs. power dissipation, 500 mm 2 of pcb copper, t a = 25c 0 20 40 60 80 100 120 140 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temper a ture (c) t j max i load = 500ma i load = 10ma i load = 100ma i load = 200ma i load = 300ma i load = 400ma i load = 1ma 08476-036 figure 36. junction temperature vs. power dissipation, 40 mm 2 of pcb copper, t a = 25c 0 20 40 60 80 100 120 140 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temper a ture (c) t j max i load = 150ma i load = 10ma i load = 1ma 08476-037 i load = 100ma i load = 75ma i load = 50ma i load = 25ma figure 37. junction temperature vs. power dissipation, 1000 mm 2 of pcb copper, t a = 50c 0 20 40 60 80 100 120 140 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temper a ture (c) t j max i load = 500ma i load = 10ma i load = 1ma 08476-038 i load = 400ma i load = 300ma i load = 200ma i load = 100ma figure 38. junction temperature vs. power dissipation, 500 mm 2 of pcb copper, t a = 50c 0 20 40 60 80 100 120 140 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temper a ture (c) t j max 08476-039 i load = 300ma i load = 200ma i load = 10ma i load = 1ma i load = 100ma i load = 500ma i load = 400ma figure 39. junction temperature vs. power dissipation, 40 mm 2 of pcb copper, t a = 50c
adp124/ADP125 rev. 0 | page 16 of 20 0 20 40 60 80 100 120 140 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temper a ture (c) t j max 08476-040 i load = 500ma i load = 400ma i load = 300ma i load = 200ma i load = 100ma i load = 10ma i load = 1ma figure 40. junction temperature vs. power dissipation, 40 mm 2 of pcb copper at board temperature = 85c printed circuit board layout considerations heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the adp124/ADP125. however, as shown in table 6 , a point of diminishing returns eventually is reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits. the input capacitor should be placed as close as possible to the vin and gnd pins, and the output capacitor should be placed as close as possible to the vout and gnd pins. use of 0402 or 0603 size capacitors and resistors achieves the smallest possible footprint solution on boards where the area is limited. 08476-041 figure 41. example adp124 pcb layout 0 8476-042 figure 42. example ADP125 pcb layout
adp124/ADP125 rev. 0 | page 17 of 20 outline dimensions 071008-a compliant to jedec standards mo-187-aa-t 0.70 0.55 0.40 8 0 0.94 0.86 0.78 seating plane 1.10 max 0.15 0.10 0.05 0.40 0.33 0.25 5.05 4.90 4.75 2.26 2.16 2.06 1.83 1.73 1.63 3.10 3.00 2.90 3.10 3.00 2.90 8 5 4 1 0.65 bsc 0.525 bsc pin 1 indicator coplanarity 0.10 0.23 0.18 0.13 top view bottom view exposed pa d for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. figure 43. 8-lead mini small outline package with exposed pad [mini_so_ep] (rh-8-1) dimensions shown in millimeters ordering guide model temperature range (t j ) output voltage (v) 1 package description package option branding adp124arhz-1.8-r7 2 C40c to +125c 1.8 8-lead mini_so_ep rh-8-1 37 adp124arhz-2.5-r7 2 C40c to +125c 2.5 8-lead mini_so_ep rh-8-1 3t adp124arhz-2.7-r7 2 C40c to +125c 2.7 8-lead mini_so_ep rh-8-1 3u adp124arhz-2.8-r7 2 C40c to +125c 2.8 8-lead mini_so_ep rh-8-1 3z adp124arhz-2.85-r7 2 C40c to +125c 2.85 8-lead mini_so_ep rh-8-1 40 adp124arhz-2.9-r7 2 C40c to +125c 2.9 8-lead mini_so_ep rh-8-1 41 adp124arhz-3.0-r7 2 C40c to +125c 3.0 8-lead mini_so_ep rh-8-1 49 adp124arhz-3.3-r7 2 C40c to +125c 3.3 8-lead mini_so_ep rh-8-1 4f ADP125arhz-r7 2 C40c to +125c 0.8 to 5.0 (adjustable) 8-lead mini_so_ep rh-8-1 38 adp124-3.3-evalz 2 3.3 evaluation board ADP125-evalz 2 adjustable evaluation board 1 up to 31 fixed-output voltage options from 1.75 v to 3.3 v are available. for additional voltage options, contact a local anal og devices, inc., sales or distribution representative. 2 z = rohs compliant part.
adp124/ADP125 rev. 0 | page 18 of 20 notes
adp124/ADP125 rev. 0 | page 19 of 20 notes
adp124/ADP125 rev. 0 | page 20 of 20 notes ?2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d08476-0-12/09(0)

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